DFT Engineer – Design for Test / Architecture / Infrastructure / ATPG / JTAG / MBIST / C++ / Tcl / Python / Digital IC’s

DFT Engineer – Design for Test / Architecture / Infrastructure / ATPG / JTAG / MBIST / C++ / Tcl / Python / Digital IC’s

We are recruiting for a number for DFT Engineers with extensive experience in the areas of DFT, including ATPG, JTAG, and MBIST, DFT specifications and driving DFT architecture and methods for designs and knowledge of Digital IC’s to join our client onsite in the Bristol area of the UK on a permanent basis.

Our client is a well established and very well funded start-up focused on developing accelerators and processors for AI and Machine Learning.

As a DFT Engineer, you will be responsible for working with the silicon team to define DFT specifications and chip test interface, developing and implementing DFT architecture and the implementation of DFT infrastructure.

Requirements

• Knowledge about industrial standards and practices in DFT, including ATPG, JTAG, MBIST and trade-offs between test quality and test time
• Experience on developing DFT specifications and driving DFT architecture and methods for designs
• Solid understanding of design verification methodologies for validating DFT implementation in simulation pre-silicon
• Experience in debugging ATPG patterns, Compressed ATPG patterns, MBIST and JTAG related issues
• Experience with STA constraints development and analysis for DFT modes and SDF simulations
• Experience in silicon bring-up, debug, and validation of DFT features
• A very good knowledge of Digital Integrated Circuits and Systems
• Familiarity with programming languages such as C/C++ and Tcl/Python scripting
• Great team working and communication skills
• Degree level qualifications in Electronics or a related field

Key words:

DFT / Design for Test / Architecture / Infrastructure / ATPG / JTAG / MBIST / C++ / Tcl / Python / Digital IC’s

#AI & Machine Learning

#hardware

#semiconductors

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