I am seeking experienced digital design/verification engineers for a number of exciting opportunities with industry giants around Europe.
With both permanent and contract vacancies, applicants for this position must have 6 years or above in either RTL System Verilog Design or System Verilog UVM Verification.
Key words: UVM / Verification / Design / RTL / SystemVerilog / System Verilog / Design Verification / Senior / Hardware / #STEM / #Semiconductors / #wireless&IoT
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