Parametric Test Engineer

Parametric Test Engineer

Our client is a leading Semiconductor IC manufacturer. For the 8 inch SMIF waferfab (0.35-0.11um capability) they have a requirement for a Parametric Test Engineer. 

What are the responsibilities in this Parametic Test Engineer role?

You will be responsible for maintaining and improving the parametric test on the advanced technologies (0.35-0.11um). Special focus will be given on the parametric test on Agilent (and Keithley) test platforms for development or engineering as well for production support aspects. 

What are the required skills in this Parametric Test Engineer role?

• Act as parametric test engineer (recipes, test routines and test programs, limit files, specifications, production support, operator training and certification, probe cards management, SPC, MSA, gage capability analysis)
• Consolidate, improve and optimize the test routines and test programs on Agilent parametric test platforms in a continuous improvement program frame
• Act as project leader with proven test structure conception, design and layout competences for test pattern design / redesign and characterization (new, optimization, stretched, dedicated, …)
• Manage, drive and execute test time reduction and test time optimization programs in the frame of overall cost reduction program
• Participate to wafer level reliability monitoring project in tight collaboration with process/integration engineers
• Participate to the future nodes parametric test activities in tight link with development team (0.11um), develop the concept and strategy, develop the roadmap and follow the execution
• Participate to any engineering or development activity on subject of parametric test (prototype, manual characterization, special tests)
• Act as project owner in the future acquisition of a new Agilent tester

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