Senior/Principal DFT Engineer – Munich

Senior/Principal DFT Engineer – Munich 

Are you interested in working for a world leading technology company at their offices in Munich?

If so they are looking to hire a number of Senior & Principal DFT Engineers to join their new team.

Core Responsibilities:

As a DFT engineer owning the complete DFT solutions in a chip design, you will have responsibilities spanning all aspects of chip design:

• Working with chip DFT team to document processor DFT specifications and define the SOC-processor test interface
• Developing and implementing DFT architecture
• Implementing DFT infrastructure
• Working with the validation team to verify DFT implementations and implement design changes
• Generating structural test vectors, analyzing and improving coverage
• Working with designers on STA, physical, power and logical issues
• Working with test engineers to bring up test vectors on silicon

Qualifications:

• Knowledge about industrial standards and practices in DFT, including ATPG, JTAG, MBIST and trade-offs between test quality and test time.
• Experience developing DFT specifications and driving DFT architecture and methods for designs.
• Knowledge of Verilog and/or VHDL, and experience with simulators and waveform debugging tools.
• Knowledge of industry standards DFT and design tools.
• Solid Understanding of design verification (DV) methodologies for validating DFT implementation in simulation pre-silicon.
• Experience in debugging ATPG patterns, Compressed ATPG patterns, MBIST, and JTAG/1500 related issues
• Experience with STA constraints development and analysis for DFT modes and SDF simulations
• Ability to conduct experiments during silicon debug, gathering and analyzing data; and utilize scripting to support efficient handling of ATE data.

Education:

• MSEE or equivalent preferred

#LI-CC1

Tagged as: #LI-CC1, DFT, Digital, Physical, test, Verilog