This role will give you the opportunity to work for an innovative start-up developing neuromorphic hardware.
As a Staff Digital IC Design Engineer your responsibilities will include:
· Lead the design and development of advance digital blocks within analog mixed signal SoCs.
· Be involved in all phases of ASIS/FPGA design flow.
· Lead development of high-level design requirements, block-level microarchitectures, and create design specifications.
· Develop RTL designs; processors, NoC interconnects, interfaces, signal processing blocks.
· Develop test benches and test cases for block-level functional verification.
· Be involved in SoC-level and FPGA top-level integration activities.
· Liaise with backend/implementation teams to address synthesis, timing, layout, and DFT issues for ASICs.
As a Staff Digital IC Design Engineer your skills will include:
· Masters or PhD degree in microelectronics, electronics engineering or similar domain
· 5+ years’ experience with complex digital IP/SoC design
· Experience with SystemVerilog, Verilog or VHDL
· Experience with designing interconnects, datapaths, interfaces, and signal processing
· Excellent knowledge of clock domain crossing (CDC) and asynchronous design techniques
· Experience with RTL designs
· Proficiency in Matlab, Python, C/C++, Perl, TCL
· Experience with EDA tools; e.g. Questa, Spyglass, Design Compiler, Vivado
Feel free to also refer someone you may know who could be good for the role. If they are successfully placed, we offer a great referral scheme!
Key words – Digital Design / ASIC / FPGA / RTL / SoC / NoC Interconnects / CDC / EDA / DfT / Synopsys / Cadence / SystemVerilog / Verilog / VHDL / Signal Processing / Matlab / Python / Perl / C / C++ / TCL / Questa / Spyglass / Vivado
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