Tapeout Support Engineer – IC / Mask Data

Tapeout Support Engineer – IC / Mask Data

Do you have experience in Tapeout of Semiconductor projects? Our client is an industry leader in the design of Discrete, Analog and Logic PowerMOS semiconductors.

This client has a long term contracting requirement for a Tapeout Support Engineer, to work onsite in Nijmegen. This is initially a 12 month project, but typically these contracts get extended multiple times.

What are the key responsibilities in this Tapeout Support Engineer role?

• Coordinating and interfacing between Design and Front End fab who take care of Mask Data Preparation (chip finishing, reticle layout, layout-to-mask preparation
• Managing entire Tape-out flow from definition to the first tap-out run
• Creating structural similarity documentation with focus on (CBT, ALVC, ABT/LVT, LSF, NXB/NXS)
• Defining risks related to the product transfers with DFMEA methodology
• Defining parameters: qual types/process, char types, optimizing validation requirements
• Handling customer related activities such as consulting Fam Binder, rogues galary, quality and process issues.
• Ensuring proper project data flow and documentation

What are the required skills in this Tapeout Support Enginee role?

• Minimum of 3 year of experience in engineering and project environments in semiconductors industry
• Experience and knowledge of the Mask Data Preparation procedure
• Experience in coordinating Tape-out flows with external foundries
• projects
• Good understanding IC design and production process
• Experienced with EDA tools (creating GDS2 files) would be a advantage
• Fluent in spoken and written English

Keywords: #IC, #Tapeout, #MaskData, #physicaldesign, #layout, #analog

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