Senior Mixed-signal IC Design Engineer

Recruitment Consultant

Chris Canneaux

Contact Details

ccanneaux@eu-recruit.com +44 (0)330 335 2350

Posted

8 days ago

Senior Mixed-signal IC Design Engineer

Tasks and Responsibilities

Specification of the analog and mixed signal blocks that are embedded in the system (ADC, DAC, PLL, data interfaces, optoelectronics …).
Design (from schematic to full verification at extracted level) of the analog and mixed-signal blocks in sub-nanometric CMOS processes. It means being involved in the full AMS design flow: system-level design, schematic, layout and full verification.
Definition of layout guidelines for layout engineers and review of their work.
Collaboration with the test engineers for the testing definition of the fabricated ICs. Review and analysis of lab characterization data for validation and correlation with simulation results.

Cooperation with the rest of the team to define the characterization tests for the circuits in which the analog and mixed-signal blocks are integrated.
Cooperation with the system-level engineers for the generation of models of analog and mixed-signal blocks for use in system-level evaluation.
Assist with the integration of the complete analog subsystem to be used in complex mixed-signal design within integrated digital logic. This will include mixed-signal verification with the digital processing
Research on new architectures and efficient solutions for the future products of the company and generation of new patents.
Internal meeting presentation and documentation of developed work.

Requirements

MSc/PhD in Electronics, Electrical, Computer Engineering or relevant field.
At least 5 years of experience in similar tasks.

Desirable Competences
Knowledge

Experience in delivering successful design in silicon: product definition, characterization, qualification and productization.
Experience on designing full-custom analog IP blocks in sub-nanometric CMOS technology (65nm/28nm or below), as well as with analog and mixed-signal IC EDA tools, such as Cadence or Synopsys.
Design (from schematic to full verification at extracted level) of the analog and mixed-signal blocks in sub-nanometric CMOS processes.
Good knowledge of full-custom analog layout techniques, including the ability to manage and review the work of others.
Excellent written and verbal English communication skills.

Industry

Semiconductor

Contract Type

Permanent

Location

Spain

City

Madrid

Work Model

On-Site

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