Physical Design Engineer/Physical Implementation Engineer

Physical Design Engineer/Physical Implementation Engineer

Description

This Physical Design Engineer position is a visible role where you will take part in the SoC physical design life cycle including full flow and Back end Implementation/verification.

Responsibilities

• Physical Design/implementation of complete SoC from netlist to tape-out.
• Floor planning, clock and power distribution, place and route
• Familiar with STA (Static timing closure with commercial tools

A big plus would be:

• Power and noise analysis (EM/IR-Drop/Xtalk)
• Layout verification (DRC/LVS)

Qualifications

5+ years experience in physical design of large scale SoC :

• Extensive experience with one of the place & route tools available today (Synopsys / Cadence). Familiar with hierarchical design approach, top-down design, timing and physical convergence
• In-depth understanding of static-timing analysis, extensive know-how in clock/power distribution and analysis, RC extraction and correlation.
• Experience with SoC practices such as multiple voltage and clock domains, integration of mixed-signal IPs and I/O integration.
• Scripting and programming experience using several of the following: Perl, TCL and Make
• Knowledge in Verilog – advantage

Key words for the role

• Physical design
• Physical implementation
• Floorplanning
• RTL2GDS
• RTL-to-GDSII
• STA (static timing analysis)
• Synthesis
• Flow

My client pays salary completely dependent on experience, they are open to junior right through to senior candidates, and will pay depending on this. They do pay in the top percentile compared to other companies in similar domains and are well known for high salaries and big benefits. This is to explain the gap between minimum and maximum salary.

Tagged as: Digital Back end design, Flow, Physical design/Physical implementation, RTL2GDS, STA