ASIC Design Engineer – CONTRACT – Verilog/UVM

ASIC Design Engineer – UVM/Verilog – 6 month rolling contract +

We are currently working with a globally-renowned semiconductor client who are looking for a Digital Design Engineer to join their team as a freelancer initially for 6 months. This role is onsite in Cambridge working on cutting edge IP technology. 

Required skills for this ASIC Design Role include:

• Extensive knowledge of Verilog for IP design
• Strong knowledge of UVM/Formal Verification
• Knowledge of Mentor, Cadence and Synopsys tools preferred

If you are interested in hearing more about this ASIC Digital Design role,  apply directly to this advert or email me at oh@eu-recruit.com.

*Due to licensing, candidates MUST already have a valid EU work permit*

Keywords: Digital Design, Digital IC design, IC, Integrated circuits, Semiconductor, ASIC, Verilog, UVM, Formal Verification, DFT, IP, Mentor, Synopsys, Cadence, ARM, SVN, SoC, ISO7816

By applying to this role you understand that we may collect your personal data and store and process it on our systems. For more information please see our Privacy Notice https://eu-recruit.com/about-us/privacy-notice/