Digital Design Engineer – RTL / ASIC / SystemVerilog

Digital Design Engineer – RTL / ASIC / SystemVerilog

ASIC Digital Design Engineer

Opportunity to grow with a leading semiconductor company with sites across Europe – looking for Digital Design Engineers of all seniority levels

 

Responsibilities:

  •  Close interface to the Arch and System S/W teams
  •  Block and system specification through to timing-clean Verilog RTL
  • Interface to the Physical Implementation team in support of closing timing and block/chip finishing

Skills:

  • RTL Implementation
  • ASIC Digital Design
  • Subsystem Design/ Implementation
  • RTL, VHDL / Verilog, System Verilog
  • Exp with Hardware Synthesis
  • DFT/Physical design exposure would be a big PLUS.

 

If this is of interest then please get in touch and we can discuss

 

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