Digital Verification Engineer- UVM / SystemVerilog / Semiconductor

Digital Verification Engineer- UVM / SystemVerilog /Semiconductor

We’re working with an exciting Global Semiconductor company who are leaders in sensor & Power integrated circuits and they need a number of Digital Verification Engineers to join their team working remote in Italy

This role can be worked onsite in Milan (Italy) or on a remote basis in Italy

What’s in it for you?

• Remote working if you are based in Italy
• Promotion Guaranteed
• Competitive salary packages

Requirements :

• Knowledge of SystemVerilog and UVM is a must.
• Experience with the usage of Jama, MATLAB/Simulink, Python is a strong plus
• 5+ years of experience in Digital Design and/or Verification.

If you are interested, apply using the link or send your cv directly to me at fm@eu-recruit.com

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