Hardware Design Verification Engineer – Mandarin speaking ASIC / IP Verification / SoC Verification / UVM / Test bench / C / Assembly / System Verilog / Scripting / Version Control

Hardware Design Verification Engineer – Mandarin speaking ASIC / IP Verification / SoC Verification / UVM / Test bench / C / Assembly / System Verilog / Scripting / Version Control

We are recruiting for a Hardware Design, Verification Engineer with solid experience in IP or SoC Verification to join our client onsite in Shanghai on a permanent basis.

Our client is a globally known semiconductor and software / tech company and and as a Hardware Design, Verification Engineer you will be responsible for working with design, verification and validation engineers, you will design and implement verification strategies to achieve quality assurance goals, perform both black box and white box verification, and participate in design and verification reviews and recommend improvements.

Required skills:

• Good knowledge of digital integrated circuit verification techniques and methodologies
• Experience of IP or SOC level verification and ensure quality for tape-out
• Fluent Mandarin
• Ability to determine verification requirements from analysis of specifications
• Experience with building test environments, UVM test-benches, checkers, test vectors, models, assertions, coverage analysis, C / assembly, System Verilog
• Experience of CPU, DSP, FPU architectures or debug and testing methodologies
• Good programming and scripting skills
• Experience of industry standard verification tools
• Experience of Version Control Software (Git / Mercurial / Perforce / Subversion)
• Good communication skills in spoken and written English

Desired skills:

• Ability to identify deficiencies by analysing micro architecture or formal techniques
• Experience of wider verification technologies, such formal – property based verification
• and code mutation
• A background in digital design
• Experience of Object-Orientated or Functional Programming software development

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