Physical Design Engineer – (Semiconductors)

Physical Design Engineer – (Semiconductor) **VISA CANDIDATES WELCOME!**

We are looking for an experienced Physical Design Engineer to join an innovative leader in high-speed and energy-efficient chip-chip link solutions.

You will work closely with the Architecture, RTL, DFT teams to ensure first-time-right high-volume silicon production. With the option to work at your choice of their sites across the UK or Denmark.

Responsibilities

• Timing constraints improvement and timing constraints validation, signoff Static Timing Analysis and block-level timing closure
• Synthesis, block level floor-planning, power grid design, place & route, clock tree synthesis, electromigration / IR-Drop analysis, power/signal integrity analysis, crosstalk analysis, formal equivalence checking and physical verification (DRC / LVS / Antenna)
• Participate in developing improvements to scripts/methodologies/flows
• Interact closely with the design team to understand requirements and implement solutions as also helping on providing design views for use with digital PD flows (LIB, LEF, DEF, GDS, SPEF, etc.)
• Support IP and chip level integration
• Support and interact with customers on requirements and IP delivery
• Manage workload and schedule and report to internal management team

Requirements

• 10+ years’ experience in the semiconductor industry, with min. 5 years in a digital Physical Design technical leadership role
• Bachelors/Masters of Engineering in Electronics and Electrical Engineering/Computer Science
• Experience on modern semiconductor process technologies including 28nm, 14/16nm, 7nm
• Experienced user of EDA tools for design and verification such as, Cadence Genus and Innovus, LEC, Calibre/PVS DRC/LVS, parasitic extraction, EM and IR drop, ESD, etc.)
• Experience in CPF/UPF technologies and flows is highly desirable
• Exposure to flip-chip package technologies and wire bond package technologies
• Experience in hierarchical floor planning and implementation
• Experience in release management and tape out procedures
• Experience in DFT methodologies and implementation schemes

If you may know someone who could be suitable for the role let us know! We offer a great referral scheme if they are successfully placed!

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