Senior Design for Testing Engineer (DFT) – Semiconductors – (Option for Fully Remote)

A great opportunity for a experienced DFT Engineer to join rapidly-growing Dutch semiconductor company at their site in Delft, The Netherlands.

***Option to work Hybrid in Eindhoven, or FULLY REMOTELY in Europe***

We develop ultra-efficient neuromorphic processors for AI at the edge.

These microprocessors mimic the brain’s mechanisms for processing fast data streams from sensors, enabling complex turn-key sensor analytics functionalities, with 10,000x higher performance per watt than competing solutions. Our technology serves as a critical enabler for next-generation use-cases in the IoT, wearable, embedded, and automotive domains.

Your role will mainly include the following:

• Develop and document DFT architecture strategy
• Define and implement methodologies for testability and ATPG
• Work very closely with architects, front end team and Physical design for the correct insertion of scan chains and memory BIST

Your profile:

• BSc, MSc or PhD degree in Electronic, Electrical Engineering or equivalent;
• Solid hands-on experience with DfT methodologies, design and test automation, and a working understanding of advanced fault models with scan test;
• Outstanding communication and leadership skills in cross business DfT feature analysis, method development, method deployment, implement design automation where applicable;
• Knowledge of design for test (DFT) structures such as scan chains, scan compression and verification concepts for test coverage (ATPG);
• Be able to generate ATPG and analyze coverage results and how to extend or optimize them;
• Need to know how to run gate simulation for to verify scan patterns to demonstrate functionality;
• Experience with DFT/Mbist/ATPG tools (Mentor, Synopsys);

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