UVM Verification

UVM Verification

We have multiple clients in Europe looking for experienced UVM Verification Engineers – most notably in Stockholm, Sweden.

The position in Sweden would be a long-term contract role, the details of which I can provide on request.

There are also opportunities available in the UK, Austria, Germany, Belgium amongst others. 

Requirements:

– Minimum 5 years’ Experience with ASIC / IP Verification 

– Good experience with UVM Verification 

– Experience developing test-benches from scratch

– System Verilog Experience and similar 

I can also be contacted at sp@eu-recruit.com, to provide full details, arrange an application, or answer any questions you might have. 

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Keywords:// IC, Design, Verification, UVM, VVM, System Verilog, Digital, Test Bench, Sweden