UVM Vertification Engineer

A leading technology client is searching for UVM Verification Engineers to work on a long-term consultancy basis in Stockholm.

Visa applicants are welcome however would be required to cover the cost of the visa yourself.

The Verification Engineer should have the following skills:

• Experience in UVM Verification for ASIC / FPGA

Keywords: Verification / SoC / FPGA / ASIC / C / C++ / UVM / Verilog / System Verilog / Specman / RTL / Design / Semiconductor

UVM Verification Engineer

Tagged as: Verification / SoC / FPGA / ASIC / C / C++ / UVM / Verilog / System Verilog / Specman / RTL / Design / Semiconductor