COMPILER ENGINEER FOR RISC-V CORES

COMPILER ENGINEER FOR RISC-V CORES

Your position
We are looking for a compiler engineer to join our team. You will contribute to the design and implementation of a compilation back-end for the exploitation of dedicated RISC-V processor architectures. This position is a unique opportunity to work in a cutting-edge technological setting at the crossroads of software and hardware within an interdisciplinary team. If you are an engineer wishing to be part of a highly qualified team and wishing to have an impact on the development of the next generations of processors, then let’s meet!

Key Responsibility

• Develop the compiler and its new features to improve hardware execution efficiency while maintaining its programmability. This responsibility is linked to:
  • Memory analysis and organization
  • Hardware-related constraints such as timing and energy consumption
  • Placement and routing of applications on the architecture
  • Visualization
  • Debugging tools
• Work with various compilation frameworks to compile on our custom architectures
• Debug and fix functional and performance issues
• Write unit tests and integration tests
• Collaborate with the hardware team to understand needs and suggest future improvements
• Work closely with the application development team to understand issues and deliver optimized compilers

Required Qualifications and Experience
In addition to a true team spirit, autonomy, rigor and successful experience in the development of compilers, as well as attention to work ethics, the skills we are looking for are:

•  Graduate of a master’s degree (or equivalent)
•  3+ years of experience with compilation frameworks such as GCC, LLVM and MLIR
•  Familiar with the Linux environment
•  Understanding of processor architectures and optimizations
•  Familiar with GIT version management tools
•  Familiar with CI/CD processes
•  Excellent level of oral and written English

Other Qualifications Considered

• Knowledge of processor architectures
• Familiarity with FPGA design and prototyping flows and routing placement algorithms
• Knowledge of Verilog, SystemVerilog or VHDL languages ??is a plus