ASIC Modelling Engineer

ASIC Modelling Engineer

General Summary:
About the Role
As an ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Our Engineers collaborate with cross-functional groups to determine product execution path.
We are seeking engineers to develop the memory subsystem of the new generation of our SoC’s.
You will be part of a team that models the pathway to memory infrastructure, including coherency protocols, NoC interconnect fabrics, system cache and memory controller.
Furthermore, you will also work on client IP modelling (modem, CPU, machine learning, graphics, display, camera, video and peripherals) and you will conduct exploration campaigns to identify opportunities for system cost, performance and power improvements.
 
Minimum Qualifications
 You will be proficient in:

• C++
• SystemC
• Scripting languages (e.g., python, shell, etc.)

 
Preferred Qualifications
 You will also have knowledge of:

• Cache architecture
• Memory controller architecture
• CPU, Graphics and Multimedia architecture
• On-Chip Interconnection Protocols (e.g., AXI, CHI, etc.)
• RTL design