Senior Principal Formal Verification Engineer

Join a forward-thinking semiconductor company in the European hub of Dublin as a Senior PrincipalFormal Verification Engineer. You will be instrumental in shaping the next generation of automotive technologies within their dynamic Automotive division. As pioneers in this evolving landscape, they are at the forefront of vehicle transformation through advanced embedded controllers and software platforms. 

Responsibilities

• Collaborate closely with platform architects and design leads to establish validation-friendly platform and design principles.
• Establish rigorous validation as a standard method in intellectual property validation.
• Guide the application of rigorous validation so that appropriate formal techniques are used effectively to improve the efficiency of IP and product level validation.
• Cultivate rigorous validation expertise within the Automotive Microcontrollers (ATV MC) business line and establish a Rigorous Validation Forum.
• Extend the boundaries of the application of rigorous validation in Embedded Digital, Mixed Signal, and Power-Aware Validation.
• Standardize and automate the application of rigorous validation, including through the practical application of intelligent automation techniques.

Essential Requirements

• A university qualification within a technical or scientific discipline.
• Significant professional experience (at least 15 years) with 8+ years of experience in the application of Formal Verification.
• A deep understanding of formal verification, including:
  • The application of verification techniques such as abstractions, non-determinism, invariants, assume-guarantee, etc.
  • An understanding of validation engines and how best to utilize them.
• A broad experience in the application of formal verification, including:
  • The application of verificationn for the validation of algorithms, protocols, design blocks, etc.
  • The application of formal verification in System-on-Chip verification
  • The efficient application of verification in hybrid simulation-validation environments.
• The ability to motivate and enable verification engineers to utilize rigorous methods.
• Made significant internal and external contributions in the application of verificationand can provide evidence of extending the use of this into new areas.
• A professional presence demonstrating influence on the application of verification in industry and academia.