Microcontroller Sub-system Senior Design Engineer/ Staff Design Engineer

Senior Design Engineer/ Staff Design Engineer Microcontroller Sub-system

The Microcontroller Sub-System IP team plays a crucial role in enabling embedded processing solutions across various functions and products. This team deals with security, power management, and other system-on-chip (SoC) functions across multiple business units (IoT, Mobile, Auto, XR, Compute, etc.). If you’re passionate about solving complex problems and want to be part of a diverse, multicultural team, read on!
As a Design Engineer, you’ll play a critical role in shaping cutting-edge digital designs.

Your responsibilities will include
 

• Micro-Architecture: Designing micro-architecture for both simple and complex digital blocks.
• RTL Development: Developing RTL (Register Transfer Level) code using industry best practices. This includes handling multi-clock designs, high-frequency requirements, low power, and low latency considerations while ensuring high performance.
• Debugging and Post-Silicon Bring-Up: Troubleshooting and debugging issues during the development process and supporting post-silicon bring-up activities.
• Documentation: Creating comprehensive design documentation to ensure clarity and maintainability.
• Design Optimization: Optimizing designs for key metrics such as area, power, and performance.
• Cross-Functional Collaboration: Collaborating with cross-functional teams, including DFT (Design for Testability), Implementation, Verification, Emulation, and Firmware teams.

Relevant Experience
 

• Education: Bachelor’s degree in Science, Engineering, or a related field.
• Experience: 5+ years of ASIC design experience
• Complex Digital Logic Design: Experience with designing complex digital logic blocks.
• ISA Familiarity: Knowledge of ISAs (Instruction Set Architectures) such as ARM THUMB or RISC-V.
• Processor/Microcontroller System Design: Understanding of processor or microcontroller system design.
• Multi-Power Domain and Multi-Clock Domain Designs: Experience with designs spanning multiple power domains and clock domains.
• Scripting/Automation Languages: Proficiency in scripting or automation languages like Python or Perl.
• Industry Standard Digital Tools: Familiarity with state-of-the-art industry-standard digital design tools.
• Challenges of Lower Node Technologies: Awareness of challenges faced when working with lower node technologies.

Minimum Qualifications

• Bachelor’s degree in Science, Engineering, or related field and 8+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master’s degree in Science, Engineering, or related field and 7+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.