Chief Architect (dpISA)

Chief Architect – Data Processing ISA (dpISA)

Role Overview:
We are seeking an accomplished and highly experienced Chief Architect to lead our architecture research and development initiatives. This senior-level opportunity is designed for a subject-matter expert with a deep technical background in modern Instruction Set Architectures (ISAs), including but not limited to Arm, Power, MIPS, or X86. The successful candidate will possess extensive experience in ISA design and development, with a specialized focus on memory architectures, security features, and advanced data processing ISAs (dpISA).

As Chief Architect, you will play a pivotal role in innovating and evolving ISA extensions, collaborating across multi-functional teams to drive forward-thinking technology solutions. This role demands a combination of deep technical insight, architectural leadership, and strategic vision to influence the future of computing platforms.

Key Responsibilities:

• Architecture Leadership: Lead the research, design, and ongoing refinement of modern ISAs, ensuring alignment with emerging trends in processing performance, memory systems, and security requirements.

• Advanced R&D: Drive forward ISA research initiatives, maintaining a keen awareness of new technologies, developments, and innovations within the field.

• Memory and Security Focus: Design and optimize cutting-edge memory and security architectures, prioritizing scalability, efficiency, and high-performance outcomes across diverse workloads.

• Data Processing ISA (dpISA) Development: Spearhead the creation and enhancement of data processing instruction sets, such as scalable vector and matrix extensions (e.g., SVE, SME, SSE, AVX10), tailored for contemporary and future computing demands.

• Cross-Team Collaboration: Partner closely with engineering, product, and cross-functional stakeholders to incorporate new architectural capabilities into products and platforms.

• Technology Innovation: Maintain a forward-looking perspective on technology advancements, infusing novel ideas into architectural design strategies and guiding exploratory initiatives.

• Team Leadership and Mentorship: Build and nurture a team of architecture researchers and engineers, fostering a culture of innovation, technical excellence, and continuous improvement.

Essential Qualifications:

• Educational Background: Degree-level qualification (or equivalent practical experience) in Computer Science, Electrical Engineering, or a related technical discipline.

• Instruction Set Architecture Expertise: Extensive hands-on experience with modern ISAs such as Arm, MIPS, Power, or X86 (excluding RISC-V), including architecture specification, design best practices, and performance optimization.

• Research and Evolution: Proven experience leading the research, development, and iterative evolution of ISA designs.

• Memory and Security Systems: Deep understanding of memory subsystem design and security architecture, focused on building scalable, reliable, and efficient systems.

• dpISA Development Experience: Direct experience designing and implementing scalable data processing instruction sets for high-performance applications.

• Leadership and Mentorship: Track record of successfully leading technical teams and mentoring engineers in a research and development setting.

• Problem-Solving Abilities: Exceptional analytical and innovative thinking skills, capable of delivering robust solutions to complex architectural challenges.

• Communication Skills: Ability to clearly articulate complex technical concepts to both technical and non-technical audiences.

Preferred Qualifications:

• Familiarity with next-generation processor architectures that extend beyond conventional RISC and CISC models.

• Experience developing specialized ISAs for domains such as cloud computing, edge devices, or embedded systems.

• Contributions to open-source or industry-leading architecture research initiatives.

• Demonstrated success collaborating within large, multidisciplinary teams on major technical programs.