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range of industries within the field of technology
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range of industries within the field of technology
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3D Integration (Design for Test) Engineer
3D Integration DFT Engineer
We’re seeking a 3D Integration DFT Engineer to drive innovative test solutions for complex digital, memory, and analog chips. In this role, you’ll lead research and development of Design for Test (DFT) methodologies, focusing on defect mechanisms, fault simulation, and failure analysis across 3D integrated circuits (3DICs) and I/O interconnects. You’ll also be responsible for architecting and implementing system-level Design for Excellence (DFX) strategies throughout the chip lifecycle.
Key Responsibilities:
- Lead research in DFT methodologies for digital, 3DIC, memory, and analog IPs, focusing on defect mechanisms, fault modeling, and failure analysis.
- Develop and implement advanced DFT testing strategies for 3DICs, I/O interconnects, and emerging non-volatile memories (NVM).
- Architect and implement end-to-end system-level DFX solutions, ensuring robust test and quality throughout the chip’s lifespan.
What You Bring:
- 5-10 years of experience in DFT.
- Proficiency in DFT technologies such as MBIST, SCAN, and ATPG, coupled with a strong understanding of semiconductor manufacturing and device structures.
- In-depth knowledge of digital and analog circuit failure mechanisms, fault modeling, and test algorithms.
- Proven research experience in defect mechanisms, fault simulation, and failure analysis for digital circuits, 3DICs, I/O interconnects, and memory/analog circuits.
- Hands-on experience with system-level DFX implementation, protection strategies, and failure localization.
- Master’s degree or higher in Electronics, Microelectronics, Communications, Automation, Semiconductor Engineering, Mathematics, Physics, Chemistry, or a related field.
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