Sr. System Performance Architect- OS Modelling and Simulation

Sr. System Performance Architect – OS Modeling and Simulation

Your Role:.

In this position, you will lead advanced system performance modeling and simulation efforts, ensuring seamless integration between software and hardware to enhance efficiency and maintain a competitive edge. Your expertise in identifying execution hotspots, assessing performance metrics, and driving software-hardware co-optimization—utilizing tools like gem5—will play a crucial role in innovating CPU microarchitecture design. Your contributions will directly impact product performance, energy efficiency, and the creation of cutting-edge computing systems that prioritize user experience and sustainable excellence.

Main Responsibilities:

• Conduct system performance modeling and simulation to enable collaborative optimization of software and hardware.

• Identify execution hotspots and microarchitecture bottlenecks through a top-down analysis of computing load requirements and critical service scenarios, supporting software architecture enhancements and hardware acceleration strategies.

• Develop performance models for software loads and hardware/chip architectures, establishing evaluation frameworks for user experience performance metrics and contributing to chip and product performance assessments.

• Oversee the development and maintenance of the gem5 emulator for in-depth system performance evaluation and optimization.

• Design benchmarks aligned with terminal software characteristics, guiding CPU microarchitecture advancements and refining the synergy between software and hardware for improved product performance and energy efficiency.

Skills & Qualifications:

• Master’s degree or higher in IC, Microelectronics, Computer Science, Communication, or a related field, with hands-on experience in chip performance modeling, simulation, and software-hardware co-optimization.

• Proficiency in system performance modeling and simulation tools (e.g., gem5, QEMU), with the capability to develop and maintain gem5 simulators.

• Strong understanding of chip design processes and the ability to analyze and optimize chip performance.

• Expertise in software-hardware co-design methodologies for optimizing system-level performance.

• Deep knowledge of benchmark construction and microarchitecture design, with the ability to guide CPU microarchitecture optimization efforts.