DFT Team Leader / Tech Lead

Recruitment Consultant

Louis Livingstone

Contact Details

[email protected] +44 (0)333 307 0341

Posted

6 days ago

We’re seeking a dynamic and experienced DFT Team Leader / Technical Leader to join a growing team. In this leadership role, you’ll play a pivotal role in defining, implementing, and monitoring DFT activities throughout the entire product lifecycle. You’ll be responsible for managing, motivating, and developing a high-performing DFT team to ensure exceptional product quality.

Responsibilities

Oversee all DFT activities for all circuits, collaborating closely with the R&D Development Director.
Foster the technical expertise of the DFT team, working in partnership with the technical and development director.
Champion a DFT methodology for the design flow, including DFT insertion, static timing analysis, test vector generation, and validation.
Implement Design Rule Checks (DRC) using SPYGLASS in RTL and develop DFT design constraints.
Analyze DFT metrics and propose solutions to optimize yield, test coverage, and test time across various stages (wafer, package, operation).
Collaborate seamlessly with Front-End Design and Back-End Digital teams to ensure minimal impact on circuit performance, power, and area (PPA) during DFT insertion.
Conduct static timing analysis for all test logic at various levels (physical partition and top-level).
Partner with test engineers to provide and validate test patterns on Automated Test Equipment (ATE).
Define the testing strategy for analog components within the design.
Coordinate the production launch for multiple circuits annually.
Safeguard technical objectives, product quality, and development processes.
Ensure proper documentation of all product-related work.
Lead, organize, and actively participate in DFT reviews.
Report progress and challenges to the project team and development director.

Qualifications & Experience

10+ years of experience in DFT, establishing you as a recognized leader in the field.
Proven track record in defining and planning DFT stages on complex circuits exceeding 30 million instances.
Extensive experience with DFT methodologies including Scan/EDT/SSN, Logic BIST, MBIST, ATPG, and Boundary Scan on complex circuits (over 30M instances).
Proficiency in scripting languages like Pearl, TCL, or Python.
Solid understanding of logic synthesis and static timing analysis.
In-depth knowledge of the DFT flow, with experience in Tessent tools (a plus).
Strong grasp of design concepts, simulations, and physical implementation, considering their impact on final product quality.
Excellent written and oral communication skills in English, coupled with strong leadership, team-building, and a positive, proactive attitude.

Industry

Semiconductor

Contract Type

Permanent

Location

France

Work Model

On-Site

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DFT Team Leader / Tech Lead

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