GPU Emulation Engineer

Recruitment Consultant

Liam Geary

Contact Details

lg@eu-recruit.com +44 (0)330 335 2402

Posted

23 hours ago

Job Description:

Synthesize the Verilog RTL and create models and compile them to emulators like Veloce/Palladium/Zebu and/or FPGA platforms
Develop all aspects of hardware emulator implementation, with emphasis on design partitioning, synthesis, place and route, timing analysis & run time performance.
Drive debug failures on emulator using latest technologies. Work with designers and SW driver team for testplan and debug.
Work with tool vendors and push the methodology to improve the area/performance of the synthesized FPGA RTL.
Work on third-party IP integration and system-level debugging.
System level RTL simulation & design verification.
Support chip bring up and post silicon debug.
Debug functional and timing models.

Preferred Qualifications:

Bachelor’s degree in Science, Engineering, or closely related field
3+ years of hands on experience in emulation/simulation acceleration/FPGA.
2+ years of hands on experience in creating high performance & area efficient emulation environments from RTL.
2+ years of hands on emulator platforms, platform bringup, digital design, verification, debugging, and waveform viewers
2+ Hardware emulators, such as Palladium, ZeBu, Veloce, or FPGA systems based on Xilinx or Altera FPGAs
2+ Emulation methodologies, including in-circuit emulation, hybrid systems, or simulation acceleration

Desirable Skills:

MS degree in Electrical Engineering or equivalent; 2 year of practical experience
Design Verification knowledge – UVM/System Verilog preferred
Knowledge of GPU/CPU/DDR/Bus preferred
Verilog and System Verilog experience.
Debugging system-level software, Debug RTL
Programming skills in C and C++
Scripting in Python, Tcl, or Perl
Knowledge of Vendor Emulation tools/Xilinx tools/Synthesis tools

Industry

Semiconductor

Contract Type

Permanent

Location

United Kingdom

City

Cambridge

Work Model

On-Site

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