Senior Chiplet Verification Engineer

Recruitment Consultant

Jamie Coltman

Contact Details

jc@eu-recruit.com +44 (0)333 307 1115

Posted

7 hours ago

Our client, a North American ASIC Services provider is looking for experienced Verification engineers to join their growing team in Ottawa to work on various Design projects for semiconductor clients across North America.

The I/O chiplet connects die-to-die interfaces with multi-protocol, high-speed I/O, combining UCIe, PCIe, Ethernet, static switching, and an embedded management subsystem.

You will collaborate closely with architecture, RTL, verification, firmware, physical design, and IP teams to deliver complex silicon solutions.
Client identity and detailed programme specifications will be shared confidentially during the interview process.

About the Position
You will establish and execute verification plans for assigned blocks, subsystems, and chip-level functions. Working closely with designers and architects, you will translate requirements into measurable verification goals and deliver the evidence required for sign-off.

The role covers both high-speed datapaths and firmware-controlled management functions, with ownership extending through verification closure and tape-out.

Key Responsibilities

Develop verification plans that map requirements to test scenarios, platforms, coverage goals, and sign-off criteria.
Design and maintain reusable SystemVerilog/UVM environments, including sequences, agents, scoreboards, reference models, and assertions.
Integrate vendor VIP and models, verifying configured IP and end-to-end connectivity across protocol and PHY interfaces.
Verify static-switch mappings, protocol modes, data integrity, latency, throughput, reset, and recovery behaviour.
Verify CSR access, boot and configuration sequences, sideband management, interrupts, and error-handling mechanisms in collaboration with firmware teams.
Apply simulation, formal verification, connectivity checks, low-power verification, and hardware/software co-simulation where appropriate.
Automate regressions, triage failures, and drive functional, assertion, and code coverage to closure, including documented exclusions.
Review CDC/RDC findings with designers and support gate-level sanity checks and silicon bring-up.
Report verification readiness, remaining risks, and sign-off evidence clearly to relevant stakeholders.

Must-Have Qualifications

10+ years of hands-on ASIC verification experience, with ownership through tape-out and sign-off.
Strong SystemVerilog and UVM expertise, including constrained-random stimulus and reusable testbench architecture.
Proven experience developing verification plans, defining coverage, debugging complex failures, and driving verification closure.
Experience verifying high-speed interfaces, complex SoCs, networking ASICs, or die-to-die interconnects.
Hands-on experience with VIP integration, reference modelling, scoreboarding, and assertion-based verification.
Strong understanding of multi-clock and reset behaviour, protocol corner cases, and the limitations of simulation and static verification.
Strong scripting and regression automation skills, with disciplined test and configuration management practices.
Ability to work independently, review others’ work, and clearly communicate remaining risks and sign-off evidence.

Nice-to-Have Experience

Experience with UCIe, PCIe Gen6/Gen7, Ethernet PCS/FEC, 224G SerDes, or mixed-signal IP verification.
Formal model checking, connectivity verification

Embedded processor verification, secure boot, AXI/APB, register models, or firmware-driven testing.
FPGA prototyping or emulation and silicon bring-up experience.
Experience with reviewed and controlled AI-assisted verification workflows.

Industry

Semiconductor

Contract Type

Permanent

Location

Canada

City

Ottawa

Work Model

hybrid

Apply for a vacancy

Apply Now

By applying to this role, you acknowledge that we may collect, store, and process your personal data on our systems.

For more information, please refer to our
Privacy Notice

Name

Phone

Location

Message

Upload CV:

Choose file

Formats: Word, PDF (max. size: 20MB)

Subscribe for industry highlights.

Send Application

Senior Chiplet Verification Engineer

Apply Now

Other relevant jobs

Senior Chiplet Verification Engineer

Senior ASIC RTL Design Engineer

Sensors Subsystem Design Engineer (all levels)

Staff Systems Engineer (AI & DSP)

AI Kernel Optimization Engineer

Senior Analog IC Design Engineer

Principal Engineer – GPU Compiler Developer

Principal Analog Mixed-Signal Engineer

Principal Engineer – GPU Driver & System Software

Senior ASIC Design Engineer – Sensors

Sensors Design Engineer – Sensors

Optical Metrology Engineer

Data Platform Engineer — VideoMini Data & ML Dataset Management

Test Engineer

Senior Physical Design Engineer

Senior FPGA Engineer

Metrology R&D engineer

Hardware Security Engineer

Sensors Design Verification Engineer

Sub-System Microcontroller Design Verification Engineer

Embedded Systems Security Engineer

Requirements Management Support Engineer

Front-end Wafer Process Engineer

Front-end Wafer Process Technician

Senior Precision Engineer – Laser Processing Technologies

ASIC / NoC SoC deployment architect

ASIC / NoC Verification & Solutions Engineer

ASIC / NoC Power and Solutions Senior/Staff Engineer

Staff / Senior Staff Engineer – ASIC / NoC SoC deployment Architect

Technical Writer

GPU Physical Implementation Engineer

Staff RF IC Design Engineer

Core Platform SoC Infrastructure Engineer, Senior

Sr. RF IC Design Engineer

Meta-surface Design & Simulation Engineer

ASIC Verification Engineer

Software Security Engineer

Graphics Developer – Tools Engineer

HR Generalist

Embedded Systems Software Engineer

Senior Analog Design Engineer

Senior Verification Engineer

Software FOSS Compliance Engineer

IT Infrastructure Project Manager

Field Service Engineer

System Validation Engineer

Senior Timing Engineer

Senior AI Engineer – Automotive In-Cabin Monitoring

Optical Device Researcher

Test Development Engineer

Senior Layout Engineer

Litho Process Engineer

Project Manager IT&OT Projects

ADAS Perception Engineer – Lane Detection & Departure Warning

Field Applications Engineer – Power Electronics

Senior Field Applications Engineer – MCU & Embedded Systems

Senior Field Application Engineer – Analog & Power

Senior Chip Application Engineer

Server CPU Physical Design Engineer, Senior/Staff level

Technical Marketing Manager Silicon Photonics

Senior Data Center, AI Software Product Strategy & Go-To-Market Lead

Senior Staff Software Engineer/Architect – Runtime Engineer

Senior Staff Embedded Software Engineer – AI Accelerator

Senior Staff Engineer – GPU Driver & System Software

CPU Physical Design Engineer

AI Compiler Engineer

Systems DSP Engineer – Sensors

AI Software Engineer – Sensors Software

Swoogo Consultant

Requirements Mgmt Tools DevOps Engineer

Verification Engineer NETC & PCIe

Full Stack Web Developer OS

Systems Engineer – Product Definition

FPGA Engineer

Senior Staff Engineer – GPU Architect

Principal Engineer – GPU Architect

Staff Engineer – GPU Architect

Looking for
tech jobs in the US?