OUR SECTORS
At European Tech Recruit, our sectors cover a wide range of industries within the field of technology.
At European Recruitment, our sectors cover a wide range of industries within the field of technology
At European Recruitment, our sectors cover a wide
range of industries within the field of technology
At European Recruitment, our sectors cover a wide
range of industries within the field of technology
Client services
Learn about the range of client services we offer at European Tech Recruit, and browse through our case sudies.
At European Recruitment, our sectors cover a wide range of industries within the field of technology
About us
Learn about European Tech Recruit's mission, values, our team, and our commitment to DE&I.
At European Recruitment, our sectors cover a wide range of industries within the field of technology
Senior FPGA Engineer
We’re looking for an experienced FPGA Design Engineer to join a growing engineering team in Ottawa. You’ll take ownership of FPGA designs from specification through implementation, working closely with hardware, verification, and systems teams to deliver robust, production-quality solutions.
This is a full-time, on-site position in Ottawa, ideal for someone looking for a stable, long-term opportunity with the potential to grow into a Design Prime role within the first few years.
Key Responsibilities
- Design and implement FPGA logic using SystemVerilog, from micro-architecture through to timing-clean implementation.
- Analyse and manage Clock Domain Crossings (CDC), including synchronization strategies and CDC verification.
- Own the FPGA synthesis flow, including tool configuration, timing constraints, and timing closure.
- Analyse synthesis and timing reports to identify and resolve timing, congestion, and resource utilisation issues.
- Collaborate with hardware, verification, and systems teams to ensure designs are robust, testable, and implementation-ready.
- Contribute to design reviews, technical documentation, and improvements to FPGA design processes.
Must-Have Experience
- 10–15 years of hands-on FPGA design experience, with the ability to quickly take ownership of complex designs.
- Strong, current experience with SystemVerilog.
- Practical experience with CDC analysis and implementation.
- Hands-on experience configuring FPGA synthesis tools.
- Strong understanding of SDC timing constraints and constraint development.
- Proven ability to analyse synthesis/timing reports and drive designs through timing closure.
- Ability to work full-time, on-site in Ottawa.
Nice to Have
- Experience with UVM-based verification.
- Scripting experience with Tcl, Python, or similar.
- Familiarity with high-speed interfaces used in optical, networking, or communications products.
Apply Now
By applying to this role, you acknowledge that we may collect, store, and process your personal data on our systems.
For more information, please refer to our
Privacy
Notice